What should be the bits of the register PSW if we want to select register bank of 8051?
Table of Contents
- 1 What should be the bits of the register PSW if we want to select register bank of 8051?
- 2 When 8051 wakes up then 0x00 is loaded to which register a PSW B SP C PC D None of the mentioned?
- 3 What should be the values of RS1 and RSO bits of PSW SFR to select register bank 2?
- 4 Which bits of the PSW register are user definable?
- 5 What should be setting of corresponding bits of PSW register for selecting the register bank 3?
- 6 How are bits of register PSW affected if Bank 2 selected?
What should be the bits of the register PSW if we want to select register bank of 8051?
Register bank 0 is the default when the 8051 is powered up. D4 and D3 bits of the PSW are used to select the desired register bank, since they can be accessed by the bit addressable instructions SETB and CLR.
When 8051 wakes up then 0x00 is loaded to which register a PSW B SP C PC D None of the mentioned?
Discussion Forum
| Que. | When 8051 wakes up then 0x00 is loaded to which register? |
|---|---|
| b. | SP |
| c. | PC |
| d. | PSW |
| Answer:PC |
What should be the values of RS1 and RSO bits of PSW SFR to select register bank 2?
Explanation: If RS1=1, RS0=0, then the register bank selected is register bank 2.
Which instructions have no effect on the flags of PSW?
7. Which instructions have no effect on the flags of PSW? Explanation: These instructions are the arithmetic operations and the flags are affected by the data copy instructions, so all these instructions don’t affect the bits of the flag.
How are the bits of the register PSW?
How are the bits of the register PSW affected if we select Bank2 of 8051? Explanation: Bits of PSW register are CY, AC, F0, RS1, RS0, OV, -, P so for selecting bank2 RS1=1 and RS0=0 which are fourth and third bit of the register respectively.
Which bits of the PSW register are user definable?
The flag register also called as the program status word uses only 6 bits. The two unused bits are user definable flags. Carry, auxiliary carry, parity and overflow flags are the conditional flags used in it. 1 is a user definable bit and PSW.
What should be setting of corresponding bits of PSW register for selecting the register bank 3?
Processor Status Word (PSW)
| Bit No | Bit Symbol | Function |
|---|---|---|
| 3 | RS0 | LSB of the register bank select bit. Look for explanation below this table. |
| 4 | RS1 | MSB of the register bank select bits. |
| 5 | F0 | User defined flag |
| 6 | AC | This bit is set if data is coming out from bit 3 to bit 4 of Acc during an Arithmetic operation. |
How are bits of register PSW affected if Bank 2 selected?
What is function of RS1 and RS0 bits in the PSW of the 8051?
The bits RS0 and RS1 are used to change the bank registers. The following figure shows the program status word register. The PSW Register contains that status bits that reflect the current status of the CPU.
Which instruction will affect the flags of PSW in 8051?
Although the flag bits affected by the ADD instruction are CY (carry flag), P (parity flag), AC (auxiliary carry flag), and OV (overflow flag) we will focus on flags CY, AC, and P for now.